1. Field of the Invention
The invention relates to a process for material-removing machining of both sides simultaneously of semiconductor wafers using optimized path curves of the semiconductor wafers relative to the upper and lower machining disk.
2. The Prior Art
A typical process sequence for the production of semiconductor wafers comprises the process steps of sawingxe2x80x94edge roundingxe2x80x94lapping or grindingxe2x80x94wet-chemical etchingxe2x80x94polishing, as well as cleaning steps before and/or after at least some of the process steps mentioned. Particularly for semiconductor wafers which are to be used as the starting product for the fabrication of modern component generations, for example there are line width requirements of 0.13 xcexcm or 0.10 xcexcm. High demands are imposed on the plane parallelism and flatness of the wafers, which in the cases mentioned above can be expressed by the flatness measure SFQRmax less than or equal to 0.13 xcexcm or 0.10 xcexcm for a component surface area of, for example, 25 mmxc3x9725 mm. This requirement can be taken into account by at least one manufacturing step in the process sequence being carried out as a step which simultaneously machines the front surface and the back surface of the semiconductor wafers. Examples of such processes include double-side lapping, double-side grinding and double-side polishing, which can be carried out as a single-wafer process or with approximately 5 to 30 semiconductor wafers being machined simultaneously.
The technology of double-side lapping of a plurality of semiconductor wafers simultaneously has long been known and is described, for example, in EP 547 894 A1, and suitable installations are commercially available in various sizes from a number of manufacturers. The semiconductor wafers are moved under a certain pressure and as a result semiconductor material is removed, while a suspension containing abrasives is supplied, between an upper and a lower working disk. This is known by the person skilled in the art as a lapping wheel which generally consists of steel and is provided with channels for improved distribution of the suspension. The wafers are kept on a geometric path by carriers which are set in rotation by means of drive rings and have cutouts for receiving the semiconductor wafers.
The purpose of the lapping is to remove damage which has been produced during the sawing of the semiconductor crystal and to produce a predetermined thickness and plane-parallelism of the semiconductor wafers. Typically, from 20 xcexcm to 120 xcexcm of semiconductor material is removed, with this material preferably being divided evenly between the two sides of the semiconductor wafer.
Processes for the double-side grinding of semiconductor wafers are also known and have recently started to replace lapping to a greater extent, on account of cost benefits. In this context, by way of example DE 196 26 396 A1 describes a process which simultaneously machines a plurality of semiconductor wafers and operates with movements of the semiconductor wafer which are similar to those used in double-side lapping. The purpose of the double-side grinding is similar to that of the lapping; the typical amounts of material removed are also similar.
The process of double-side polishing of semiconductor wafers represents a refinement of the lapping process, with planar polishing plates, to which a polishing cloth is attached. They replace the upper and lower lapping wheels as working disks, and with a polishing suspension which generally contains alkali-stabilized colloids being supplied. According to U.S. Pat. No. 5,855,735, at a solids concentration of over 6% by weight there is a transition from the chemical-mechanical double-side polishing to a double-side rough polishing in lapping mode.
Once again, in this case the semiconductor wafers are moved along a fixed path by carriers which are set in rotation, with the upper and lower polishing plates generally rotating in opposite directions. A polishing machine for this purpose is described, for example, in DE 100 07 390 A1. A process for the double-side polishing of semiconductor wafers in order to achieve high degrees of flatness, with the finished polished semiconductor wafers being only 2 to 20 xcexcm thicker than the carriers made from stainless steel, is known from DE 199 05 737 C2. With this process, it is possible to achieve semiconductor wafers with local flatness values, expressed as SFQRmax for a grid with component surface areas of 25 mmxc3x9725 mm, of less than or equal to 0.13 xcexcm. This is required for semiconductor component processes with line widths of less than or equal to 0.13 xcexcm. A process for remachining by double-side polishing is described in DE 199 56 250 C1. To protect the edge of the semiconductor wafers, according to an embodiment described in EP 208 315 B1, the carriers expediently have plastic-lined cutouts for receiving the semiconductor wafers, a process which is also in widespread use in lapping.
The purposes of the double-side polishing are to establish the final plane-parallelism and flatness of the semiconductor wafer and to eliminate damaged crystal layers and surface roughness resulting from the preceding processes, for example lapping or grinding followed by etching. The high flatness of double-side polished semiconductor wafers, combined with the presence of a polished back surface with a reduced tendency to particle adhesion, has led to the following. This abrasive polishing process is of considerably greater importance than single-side polishing of the front surface in particular for the production of semiconductor wafers with a diameter of 200 mm and above. Typically, from 10 xcexcm to 50 xcexcm of semiconductor material is removed.
In double-side polishing, generally the same amount of material is removed from the front surface and the back surface of the semiconductor wafers. By contrast, WO 00/36637 claims a process for deliberately leaving damaged crystal layers on the back surface of the wafer by removing increased amounts of material from the front surface during double-side polishing. This can be achieved by using an increased rotational speed of the upper polishing plate. According to DE 197 04 546 A1, asymmetric removal of material of this nature can also be achieved by a multistage process involving double-side polishingxe2x80x94coating of the back surface, for example with oxidexe2x80x94further double-side polishing.
To remain competitive as a manufacturer of semiconductor wafers, it is imperative to provide methods and processes which allow manufacturing with the required quality at costs which are as low as possible. An important approach in this context is to increase the yield of semiconductor wafers per machine to the highest possible level. In the case of double-side polishing, this means, for example, producing high removal rates combined with a high service life of the polishing cloths. The same is also true of double-side lapping and grinding processes, but in this case the service life of the polishing cloths is replaced, for the working disks, by the service life of the lapping wheels or of the abrasive bodies.
A drawback of this process according to the prior art is that with double-side lapping, grinding or polishing, it is impossible, while maintaining certain product properties, for example a high flatness and/or the absence of surface scratches, to achieve an increased machine throughput or a shortened cycle time with a fixed amount of material being removed. Attempts to increase the rate at which semiconductor material is removed by increasing the machining pressure have lead to a deterioration in the flatness and/or to the occurrence of surface scratches. This causes the result that the wafers produced in this way cannot be processed further, but rather have to be discarded or remachined at high cost.
U.S. Pat. No. 6,180,423 B1 describes that, in the case of single-side polishing of only one semiconductor wafer, which is held by a support and is moved in rotation about its center by means of a polishing plate which is also rotating, the path curve of the semiconductor wafer relative to the polishing cloth is dependent on the ratio of the rotational speeds of polishing plate m and support n. This document describes that the coverage of the polishing cloth is as uniform as possible as a result of this helical path curve. This is achieved by the lowest common multiple of m and n being as high as possible. A prolonged higher removal rate and an extended service life of the polishing cloth are stated to be the advantages. Even this process does not close the abovementioned gap in the prior art, since it cannot be applied to material-removal processes which operate on both sides. The rotation of the carrier is superimposed with a translational movement about the center of the machine relative to the polishing plates, so that 4 degrees of freedom have to be provided instead of 2 (i.e. the rotational speeds of the upper and lower plates, and the rotational speeds of the inner and outer drives of the carriers).
Therefore, it is an object of the invention to develop a process for the material-removing machining of both sides simultaneously of semiconductor wafers, for example by lapping, grinding or polishing, which results in cost benefits as a result of a higher yield of semiconductor wafers of a defined quality per machine.
Therefore, the present invention is directed to a process for material-removing machining, on both sides simultaneously, of semiconductor wafers having a front surface and a back surface, the semiconductor wafers resting in carriers which are set in rotation by means of an annular outer drive ring and an annular inner drive ring and being moved between two oppositely rotating working disks in a manner which is described by means of in each case a first path curve relative to the upper working disk and a second path curve relative to the lower working disk, wherein the first and the second path curves
(a) after six loops around the center have the appearance of still being open, and
(b) at each point have a radius of curvature which is at least as great as the radius of the inner drive ring.
Expressed in another way, the two path curves, after less than or equal to six loops about the center, are not continuous or are not virtually continuous and do not at any point have a radius of curvature which is less than that of the inner drive ring.
The shape of the path curves of the invention differs from the strictly helical curves of the single-side polishing according to the prior art in that a plurality of movements are superimposed as a result of the driving of the carriers and the driving of the working disks. An essential feature of the invention is that not only is there uniform coverage of both the upper and lower working disks by the path curve of the semiconductor wafer movement relative to the working disk, but also there are no sudden changes of direction. While, for example in the case of double-side polishing, the first requirement ensures uniform removal of material and rapid regeneration of the upper and lower polishing cloths. The second requirement avoids a harsh procedure acting on the semiconductor wafers. This may lead to vibration of the carrier and/or tilting of the semiconductor wafer, with the risk of poor flatness values or even of the semiconductor wafer breaking as a result of it leaving the carrier. These relationships are unexpectedly surprising and were impossible to predict. Similar considerations to those which have been described for double-side polishing also apply to double-side lapping and grinding.
The starting point for the process is a semiconductor wafer which, in a known way, has been separated from a crystal and had its edges rounded, and may also have been subjected to further process steps. Depending on the process and objectives, it may have a sawn, lapped, ground, etched, polished or epitaxially grown surface. If desired, the edge of the semiconductor wafer may be polished.
The end product of the process is a semiconductor wafer which is lapped, ground or polished on both sides, has a high flatness and freedom from scratches and is superior to the semiconductor wafers of the same quality produced in accordance with the prior art in terms of its production costs.
The process according to the invention can be used for double-side machining, for example by lapping, grinding and polishing, of various types of bodies which are in disk form and consist of a material which can be machined by the abovementioned processes. Examples of materials of this type are glasses, for example based on silica, and semiconductors, for example silicon, silicon/germanium and gallium arsenide. Silicon in single-crystal form for further use in the fabrication of electronic components, for example processors and memory components, is particularly preferred in the context of the invention.
The process is particularly suitable for the machining of semiconductor wafers with diameters of greater than or equal to 200 mm and thicknesses of 500 xcexcm to 1200 xcexcm. They can be used either directly as starting material for the production of semiconductor components or can be fed to their intended destination after further process steps have been carried out. These further steps include wet-chemical or plasma etching, polishing and/or after the application of layers such as back-surface seals or an epitaxial coating of the front surface, and/or after conditioning by means of a heat treatment. In addition to the production of wafers comprising a homogeneous material, the invention can, of course, also be used for the fabrication of semiconductor substrates which are of multilayer structure, such as SOI (silicon-on-insulator) wafers.
The process is described further with reference to the example of double-side polishing of silicon wafers. The information given on the calculation and defining of the optimized path curves can be transferred without problems by the person skilled in the art to processes with a similar kinematic procedure. Examples include double-side lapping or grinding, if working disks which are equipped with channels or abrasive bodies are used instead of polishing plates covered with polishing cloth and it is the lapping or grinding wheel which is becoming worn instead of the polishing cloth.
In principle, it is possible to subject a number of silicon wafers, which have been sawn for example by an annular-sawing or a wire-sawing process, to the double-side polishing step according to the invention directly. However, it is preferable for the sharp and therefore mechanically highly sensitive wafer edges to be rounded with the aid of a suitably profiled grinding wheel. Furthermore, to improve the geometry and partially remove the destroyed crystal layers, it is preferable for the silicon wafers to be subjected to material-removing steps such as lapping and/or grinding and/or etching, with all the abovementioned steps being carried out in accordance with the prior art.
A commercially available machine for double-side polishing of a suitable size which allows the simultaneous polishing of at least three silicon wafers using at least three carriers can be used to carry out the polishing step according to the invention. It is particularly preferable to simultaneously use from three to five carriers which are occupied by in each case three silicon wafers which are arranged at regular intervals on a circular path. However, it is also possible for each carrier to be occupied by in each case only one silicon wafer which, however, in order for it to be possible to implement the invention, should be arranged eccentrically in the carrier.
The polishing machine substantially comprises a lower polishing plate, which can rotate freely in the horizontal plane, and an upper polishing plate, which can rotate freely in the horizontal plane. Both of these plates are covered with a polishing cloth, preferably by adhesive bonding. The machine allows double-side abrasive polishing when a polishing abrasive of a suitable chemical composition is supplied continuously. The carriers, which preferably consist of stainless chromium steel, have suitably dimensioned, plastic-lined cutouts for receiving the silicon wafers. The carriers are in contact, for example by means of pin gearing or involute toothing, with the polishing machine via a rotating inner pinned or toothed ring and an oppositely rotating outer pinned or toothed ring. In this way they are set in rotational motion between the two polishing plates which are rotating in opposite directions. The pin gearing is particularly preferred, on account of the smoother running of the carriers and the ease of exchanging the pins.
The carriers for the polishing process according to the invention have a preferred thickness of 500 to 1200 xcexcm, depending on the final thickness of the polished silicon wafers, which is ultimately dependent on the diameter of the silicon wafers and on the intended use. With a view to production of highly planar silicon wafers, it is preferable for the final thickness of the polished wafers to be 2 to 20 xcexcm greater than the carrier thickness, with the range from 3 to 10 xcexcm being particularly preferred. The amount of silicon removed by the double-side polishing is preferably 2 to 70 xcexcm, particularly preferably 5 to 50 xcexcm.
To describe the invention, there are figures which illustrate the invention. Parameters which are marked in the drawings are printed in bold in the following considerations relating to the path curves. All the data refers to the polishing of silicon wafers with a diameter of 300 mm on a commercially available double-side polishing machine of type AC2000 produced by Peter Wolters, Rendsburg (Germany). This polishing machine is equipped with pin toothing of the outer and inner rings for the purpose of driving the carriers. The relationships on which the invention is based can be transferred in a similar way to smaller or larger polishing machines and to lapping and grinding machines and material-removing machines which operate with similar kinematics and to the machining of smaller or larger semiconductor wafers. The figures therefore in no way limit the invention.